Exercise DET-05.03 – Floor indicator of a lift (Solution)

Prof. Dr. Thorsten Jungmann (last updated 2026-11-02)

Relates to DET-05 Codes, code converters and standard components

Task

The cabin of a lift shows the floor on a 7-segment display. In a building with the floors 0 to 7, the controller of the lift delivers the floor as a binary code word with the bits $A$ , $B$ and $C$ , $A$ with the weight 4. A code converter turns this code word into the seven segment signals $Y_{a}$ to $Y_{g}$ ; each of them is 1 when its segment lights up. The figure shows which segments form which digit, and the truth table gives the same code as bits.

A 7-segment display with the segments a to g, next to the digits 0 to 7 with their lit segments highlighted

Floor	$A$	$B$	$C$	$Y_{a}$	$Y_{b}$	$Y_{c}$	$Y_{d}$	$Y_{e}$	$Y_{f}$	$Y_{g}$
0	0	0	0	1	1	1	1	1	1	0
1	0	0	1	0	1	1	0	0	0	0
2	0	1	0	1	1	0	1	1	0	1
3	0	1	1	1	1	1	1	0	0	1
4	1	0	0	0	1	1	0	0	1	1
5	1	0	1	1	0	1	1	0	1	1
6	1	1	0	1	0	1	1	1	1	1
7	1	1	1	1	1	1	0	0	0	0

a) Minimize $Y_{a}$ with a Karnaugh map.

b) Minimize $Y_{d}$ with a Karnaugh map.

c) Minimize $Y_{g}$ with a Karnaugh map. Is your result unique?

The other four segments are minimized in the same way, with these results:

$Y_{b} = \overline{A} + B \cdot C + \overline{B} \cdot \overline{C}$
$Y_{c} = A + \overline{B} + C$
$Y_{e} = \overline{A} \cdot \overline{C} + B \cdot \overline{C}$
$Y_{f} = A \cdot \overline{B} + A \cdot \overline{C} + \overline{B} \cdot \overline{C}$

d) Which product terms occur in the results of more than one segment? How many AND gates does the code converter need if it shares these terms between its segments, and how many if it does not?

e) Draw the part of the circuit that forms $Y_{d}$ and $Y_{e}$ according to the standard of the International Electrotechnical Commission (IEC), IEC 60617, with shared AND gates.

f) Check your results for floor 5: which segments light up, and does the digit agree with the truth table?

◀️ Back to the task

Solution

Given

Given explicitly:

the inputs $A$ , $B$ and $C$ , the binary code word of the floor, $A$ with the weight 4
the outputs $Y_{a}$ to $Y_{g}$ , one for each segment, 1 when the segment lights up
the truth table of the 7-segment code for the floors 0 to 7
the minimized expressions of $Y_{b}$ , $Y_{c}$ , $Y_{e}$ and $Y_{f}$

Known:

The six steps of the synthesis (DET-03)
The 7-segment display and its code (DET-05)
Karnaugh map with loops of ones (DET-03); minimizing the segments and sharing product terms between them (DET-05)
From the expression to the circuit (DET-03); checking the circuit against the description (DET-03)

Required

a) to c) the minimal disjunctive normal form (DNF) of $Y_{a}$ , $Y_{d}$ and $Y_{g}$ ; in c) also whether it is unique
d) the product terms that several segments share, and the number of AND gates with and without sharing
e) the part of the circuit for $Y_{d}$ and $Y_{e}$
f) the check for floor 5

a) Segment a

The truth table is already there: steps 1 and 2 of the synthesis are done (DET-03, 1.1). Steps 3 and 4 follow for each segment on its own, as for the 7-segment display decoder of the lesson (DET-05, 3.4). From the column $Y_{a}$ , read the floors with a 1:

Y_{a} (A, B, C) = \sum m (0, 2, 3, 5, 6, 7)

Put these ones into the map (figure) and draw the largest possible loops (DET-03, 4.2). The first and the last column are neighbours, so a loop may run across the edge.

Karnaugh map of segment a with ones for the floors 0, 2, 3, 5, 6 and 7 and the loops of its minimal disjunctive normal form

The loops: $B$ covers the floors 2, 3, 6 and 7, $A \cdot C$ covers the floors 5 and 7 and $\overline{A} \cdot \overline{C}$ , across the left and right edge, covers the floors 0 and 2:

Y_{a} = B + A \cdot C + \overline{A} \cdot \overline{C}

b) Segment d

The column $Y_{d}$ has a 1 on the floors 0, 2, 3, 5 and 6:

Y_{d} (A, B, C) = \sum m (0, 2, 3, 5, 6)

Karnaugh map of segment d with ones for the floors 0, 2, 3, 5 and 6 and the loops of its minimal disjunctive normal form

The loops: $\overline{A} \cdot B$ covers the floors 2 and 3, $\overline{A} \cdot \overline{C}$ , across the left and right edge, covers the floors 0 and 2, $B \cdot \overline{C}$ covers the floors 2 and 6 and $A \cdot \overline{B} \cdot C$ covers floor 5:

Y_{d} = \overline{A} \cdot B + \overline{A} \cdot \overline{C} + B \cdot \overline{C} + A \cdot \overline{B} \cdot C

c) Segment g

The column $Y_{g}$ has a 1 on the floors 2, 3, 4, 5 and 6:

Y_{g} (A, B, C) = \sum m (2, 3, 4, 5, 6)

Karnaugh map of segment g with ones for the floors 2, 3, 4, 5 and 6 and the loops of its minimal disjunctive normal form

The loops: $\overline{A} \cdot B$ covers the floors 2 and 3, $A \cdot \overline{B}$ covers the floors 4 and 5 and $B \cdot \overline{C}$ covers the floors 2 and 6:

Y_{g} = \overline{A} \cdot B + A \cdot \overline{B} + B \cdot \overline{C}

The ones of the floors 3 and 5 each lie in only one loop, so $\overline{A} \cdot B$ and $A \cdot \overline{B}$ are essential. The one of floor 6 remains, and two loops of equal size can take it: $B \cdot \overline{C}$ with floor 2 or $A \cdot \overline{C}$ with floor 4. So the result is not unique. The other minimal DNF is:

Y_{g} = \overline{A} \cdot B + A \cdot \overline{B} + A \cdot \overline{C}

The solution goes on with $B \cdot \overline{C}$ , which $Y_{d}$ and $Y_{e}$ need as well.

The maps of the other four segments

The task gives these four results. Their maps show where they come from.

Segment b

The column $Y_{b}$ has a 1 on the floors 0, 1, 2, 3, 4 and 7:

Y_{b} (A, B, C) = \sum m (0, 1, 2, 3, 4, 7)

Karnaugh map of segment b with ones for the floors 0, 1, 2, 3, 4 and 7 and the loops of its minimal disjunctive normal form

The loops: $\overline{A}$ covers the floors 0, 1, 2 and 3, $B \cdot C$ covers the floors 3 and 7 and $\overline{B} \cdot \overline{C}$ covers the floors 0 and 4:

Y_{b} = \overline{A} + B \cdot C + \overline{B} \cdot \overline{C}

Segment c

The column $Y_{c}$ has a 1 on the floors 0, 1, 3, 4, 5, 6 and 7:

Y_{c} (A, B, C) = \sum m (0, 1, 3, 4, 5, 6, 7)

Karnaugh map of segment c with ones for the floors 0, 1, 3, 4, 5, 6 and 7 and the loops of its minimal disjunctive normal form

The loops: $A$ covers the floors 4, 5, 6 and 7, $\overline{B}$ covers the floors 0, 1, 4 and 5 and $C$ covers the floors 1, 3, 5 and 7:

Y_{c} = A + \overline{B} + C

This segment is dark on floor 2 only. Three single inputs need no AND gate at all.

Segment e

The column $Y_{e}$ has a 1 on the floors 0, 2 and 6:

Y_{e} (A, B, C) = \sum m (0, 2, 6)

Karnaugh map of segment e with ones for the floors 0, 2 and 6 and the loops of its minimal disjunctive normal form

The loops: $\overline{A} \cdot \overline{C}$ , across the left and right edge, covers the floors 0 and 2 and $B \cdot \overline{C}$ covers the floors 2 and 6:

Y_{e} = \overline{A} \cdot \overline{C} + B \cdot \overline{C}

Segment f

The column $Y_{f}$ has a 1 on the floors 0, 4, 5 and 6:

Y_{f} (A, B, C) = \sum m (0, 4, 5, 6)

Karnaugh map of segment f with ones for the floors 0, 4, 5 and 6 and the loops of its minimal disjunctive normal form

The loops: $A \cdot \overline{B}$ covers the floors 4 and 5, $A \cdot \overline{C}$ , across the left and right edge, covers the floors 4 and 6 and $\overline{B} \cdot \overline{C}$ covers the floors 0 and 4:

Y_{f} = A \cdot \overline{B} + A \cdot \overline{C} + \overline{B} \cdot \overline{C}

A single input, such as $B$ in $Y_{a}$ , needs no AND gate. The other product terms need one AND gate each, unless two segments use the same term; then one gate can serve both (DET-05, 3.4):

Product term	Used by the segments	Number of uses
$A \cdot C$	a	1
$\overline{A} \cdot \overline{C}$	a, d and e	3
$B \cdot C$	b	1
$\overline{B} \cdot \overline{C}$	b and f	2
$\overline{A} \cdot B$	d and g	2
$B \cdot \overline{C}$	d, e and g	3
$A \cdot \overline{B} \cdot C$	d	1
$A \cdot \overline{B}$	f and g	2
$A \cdot \overline{C}$	f	1

The terms that occur in more than one segment are $\overline{A} \cdot \overline{C}$ , $\overline{B} \cdot \overline{C}$ , $\overline{A} \cdot B$ , $B \cdot \overline{C}$ and $A \cdot \overline{B}$ . With shared terms, the code converter needs one AND gate for each row of the table, 9 in all. Without sharing, each segment builds its own terms. Segments a to g need:

2 + 2 + 0 + 4 + 2 + 3 + 3 = 16

So sharing saves $16 - 9 = 7$ AND gates. With the other minimal form of $Y_{g}$ , both numbers stay the same: $A \cdot \overline{C}$ exists anyway for $Y_{f}$ , and $B \cdot \overline{C}$ for $Y_{d}$ and $Y_{e}$ . Only the list of shared terms grows: $Y_{f}$ and $Y_{g}$ then share $A \cdot \overline{C}$ as well.

e) Circuit for two segments

Step 5 of the synthesis turns the expressions into gates (DET-03, 5.1). $Y_{d}$ needs an OR gate with four inputs over four AND gates. $Y_{e}$ needs an OR gate with two inputs and no AND gate of its own, because its terms $\overline{A} \cdot \overline{C}$ and $B \cdot \overline{C}$ already exist for $Y_{d}$ (figure). The inverters for $A$ , $B$ and $C$ serve all gates.

Part of the code converter according to IEC 60617: three inverters, four AND gates and two OR gates that form Y d and Y e, sharing the AND gates for A bar C bar and B C bar

f) Check for floor 5

Step 6 compares the circuit with the description, here the truth table (DET-03, 5.3). Floor 5 is the code word 101. For $A = 1$ , $B = 0$ and $C = 1$ :

Y_{a} Y_{b} Y_{c} Y_{d} Y_{e} Y_{f} Y_{g} = B + A \cdot C + \overline{A} \cdot \overline{C} = 0 + 1 \cdot 1 + \overline{1} \cdot \overline{1} = 1 = \overline{A} + B \cdot C + \overline{B} \cdot \overline{C} = \overline{1} + 0 \cdot 1 + \overline{0} \cdot \overline{1} = 0 = A + \overline{B} + C = 1 + \overline{0} + 1 = 1 = \overline{A} \cdot B + \overline{A} \cdot \overline{C} + B \cdot \overline{C} + A \cdot \overline{B} \cdot C = \overline{1} \cdot 0 + \overline{1} \cdot \overline{1} + 0 \cdot \overline{1} + 1 \cdot \overline{0} \cdot 1 = 1 = \overline{A} \cdot \overline{C} + B \cdot \overline{C} = \overline{1} \cdot \overline{1} + 0 \cdot \overline{1} = 0 = A \cdot \overline{B} + A \cdot \overline{C} + \overline{B} \cdot \overline{C} = 1 \cdot \overline{0} + 1 \cdot \overline{1} + \overline{0} \cdot \overline{1} = 1 = \overline{A} \cdot B + A \cdot \overline{B} + B \cdot \overline{C} = \overline{1} \cdot 0 + 1 \cdot \overline{0} + 0 \cdot \overline{1} = 1

The segments a, c, d, f and g light up. These are the ones in the row of floor 5 of the truth table, and in the figure they form the digit 5 ✓

The simulation shows the whole code converter with its nine AND gates and seven OR gates (DET-05, 3.5). Switch the three inputs through all eight code words and compare the logic outputs and the digit with each row of the truth table.

Simulation of the code converter of the floor indicator from inverters, nine AND gates and seven OR gates: the inputs 1, 0 and 1 make the 7-segment display show the digit five

Open in the simulator

Circuit as text (File → Import From Text…)

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</cir>

Wattsinside

Exercise DET-05.03 – Floor indicator of a lift (Solution)

Task